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Rana Numan Digital Design, Scientific Research, Verilog / VHDL, Antenna Design, ASIC, Embedded Systems, FPGA Coding, RADAR/LIDAR, Radio Frequency, SoC Design

Rana Numan

Preferred Wages: 100 Rs. per Hour
Preferred Salary: 10000 Rs. per Month
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An SoC design verification engineer, with good command on verilog/system verilog, computer architecture, RISCV architecture, C language for implementing RISCV ISA. Making of Assembler and simulator in C for RISC V are my recent project.

Rana Numan Profile

Qualification:
Bachelors Degree
Major Subjects:
DLD, Computer Architecture
Gender:
Male
Experience:
1 Years
Nationality:
Pakistan
Location:
Gujranwala, Pakistan
Institution:
University Of Engineering & Technology, Taxila
Career Level:
Professional
Functional Area:
Engineering
Professional Industry:
Electronics


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